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LY6220488 rev. 0.3 2048k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 0 ? revision history revision description issue date rev. 0.1 initial issue sep.1.2008 rev. 0.2 revised features & ordering information lead free and green package available to green package available added packing type in ordering information deleted t solder in absolute maximun ratings may.20.2009 rev. 0.3 revised v dr sep.11.2009
LY6220488 rev. 0.3 2048k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 1 ? features ? fast access time : 55/70ns ? low power consumption: operating current : 45/30ma (typ.) standby current : 10 a (typ.) ll-version ? single 4.5v ~ 5.5v power supply ? all inputs and outputs ttl compatible ? fully static operation ? tri-state output ? data retention voltage : 1.5v (min.) ? green package available ? package : 44-pin 400 mil tsop-ii general description the LY6220488 is a 16,777,216-bit low power cmos static random ac cess memory organized as 2,097,152 words by 8 bits. it is fabricated using very high performance, high reliability cmos technology. its standby current is stable within the range of operating temperature. the LY6220488 is well designed for very low power system applications, and particularly well suited for battery back-up nonvolatile memory application. the LY6220488 operates from a single power supply of 4.5v ~ 5.5v and all inputs and outputs are fully ttl compatible product family power dissipation product family operating temperature vcc range speed standby(i sb1, typ.) operating(icc,typ.) LY6220488 0 ~ 70 4.5 ~ 5.5v 55/70ns 10a(ll) 45/30ma LY6220488(e) -20 ~ 80 4.5 ~ 5.5v 55/70ns 10a(ll) 45/30ma LY6220488(i) -40 ~ 85 4.5 ~ 5.5v 55/70ns 10a(ll) 45/30ma functional block diagram decoder i/o data circuit control circuit 2048kx8 memory array column i/o a0-a20 vcc vss dq0-dq7 ce# we# oe# ce2 pin description symbol description a0 ? a20 address inputs dq0 ? dq7 data inputs/outputs ce#, ce2 chip enable inputs we# write enable input oe# output enable input v cc power supply v ss ground nc no connection
LY6220488 rev. 0.3 2048k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 2 ? pin configuration LY6220488 a1 a2 a3 a4 nc nc nc dq0 vcc vss a14 a19 nc dq6 dq7 dq5 vss vcc dq4 nc dq1 dq2 tsop-ii 28 14 13 12 11 10 9 8 7 6 5 4 3 2 1 17 16 15 20 19 18 22 23 24 25 26 27 21 a18 a0 nc a20 a5 a6 a7 a10 a11 dq3 nc a17 a16 a15 a12 a9 34 29 30 31 32 33 44 39 40 41 42 43 35 36 37 38 a13 ce# we# a8 ce2 oe#
LY6220488 rev. 0.3 2048k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 3 ? absolute maximum ratings parameter symbol rating unit voltage on v cc relative to v ss v t1 -0.5 to 6.5 v voltage on any other pin relative to v ss v t2 -0.5 to v cc +0.5 v 0 to 70(c grade) -20 to 80(e grade) operating temperature t a -40 to 85(i grade) storage temperature t stg -65 to 150 power dissipation p d 1 w dc output current i out 50 ma *stresses greater than those listed under ?absolute maximum ratings ? may cause permanent damage to the device. this is a stress rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to the absolute maximum rating conditions for extended period may affect device reliabil ity. truth table mode ce# ce2 oe# we# i/o operation supply current h x x x high-z i sb ,i sb1 standby x l x x high-z i sb ,i sb1 output disable l h h h high-z i cc ,i cc1 read l h l h d out i cc ,i cc1 write l h x l d in i cc ,i cc1 note: h = v ih , l = v il , x = don't care.
LY6220488 rev. 0.3 2048k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 4 ? dc electrical characteristics parameter symbol test condition min. typ. *4 max. unit supply voltage v cc 4.5 5.0 5.5 v input high voltage v ih *1 2.4 - v cc +0.3 v input low voltage v il *2 - 0.2 - 0.6 v input leakage current i li v cc R v in R v ss - 1 - 1 a output leakage current i lo v cc R v out R v ss output disabled - 1 - 1 a output high voltage v oh i oh = -1ma 2.4 - - v output low voltage v ol i ol = 2ma - - 0.4 v - 55 - 45 60 ma i cc cycle time = min. ce# = v il and ce2 = v ih i i/o = 0ma other pins at v il or v ih - 70 - 30 50 ma average operating power supply current i cc1 cycle time = 1 s ce# Q 0.2v and ce2 R v cc -0.2v i i/o = 0ma other pins at 0.2v or v cc -0.2v - 8 16 ma i sb ce# = v ih or ce2 = v il other pins at v il or v ih - 0.3 2 ma -ll - 10 60 a -lle - 10 80 a standby power supply current i sb1 ce# v R cc -0.2v or ce2 Q 0.2v other pins at 0.2v or v cc -0.2v -lli - 10 100 a notes: 1. v ih (max) = v cc + 3.0v for pulse width less than 10ns. 2. v il (min) = v ss - 3.0v for pulse width less than 10ns. 3. over/undershoot specifications are characterized, not 100% tested. 4. typical values are included for reference only and are not guaranteed or tested. typical values are measured at v cc = v cc (typ.) and t a = 25 capacitance (t a = 25 , f = 1.0mhz) parameter symbol min. max unit input capacitance c in - 6 pf input/output capacitance c i/o - 8 pf note : these parameters are guaranteed by devic e characterization, but not production tested. ac test conditions input pulse levels 0.2v to v cc - 0.2v input rise and fall times 3ns input and output timing reference levels 1.5v output load c l = 30pf + 1ttl, i oh /i ol = -1ma/2ma
LY6220488 rev. 0.3 2048k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 5 ? ac electrical characteristics (1) read cycle LY6220488-55 LY6220488-70 parameter sym. min. max. min. max. unit read cycle time t rc 55 - 70 - ns address access time t aa - 55 - 70 ns chip enable access time t ace - 55 - 70 ns output enable access time t oe - 30 - 35 ns chip enable to output in low-z t clz * 10 - 10 - ns output enable to output in low-z t olz * 5 - 5 - ns chip disable to output in high-z t chz * - 20 - 25 ns output disable to output in high-z t ohz * - 20 - 25 ns output hold from address change t oh 10 - 10 - ns (2) write cycle LY6220488-55 LY6220488-70 unit parameter sym. min. max. min. max. write cycle time t wc 55 - 70 - ns address valid to end of write t aw 50 - 60 - ns chip enable to end of write t cw 50 - 60 - ns address set-up time t as 0 - 0 - ns write pulse width t wp 45 - 55 - ns write recovery time t wr 0 - 0 - ns data to write time overlap t dw 25 - 30 - ns data hold from end of write time t dh 0 - 0 - ns output active from end of write t ow * 5 - 5 - ns write to output in high-z t whz * - 20 - 25 ns *these parameters are guaranteed by device characterization, but not production tested.
LY6220488 rev. 0.3 2048k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 6 ? timing waveforms read cycle 1 (address controlled) (1,2) dout data valid t oh t aa address t rc previous data valid read cycle 2 (ce# and ce2 and oe# controlled) (1,3,4,5) dout data valid t oh oe# high-z high-z t clz t olz t oe t chz t ohz ce2 t ace ce# t aa address t rc notes : 1.we# is high for read cycle. 2.device is continuously selected oe# = low, ce# = low ., ce2 = high . 3.address must be valid prior to or coincident with ce# = low , ce2 = high; otherwise t aa is the limiting parameter. 4.t clz , t olz , t chz and t ohz are specified with c l = 5pf. transition is measured 500mv from steady state. 5.at any given temperature and voltage condition, t chz is less than t clz , t ohz is less than t olz.
LY6220488 rev. 0.3 2048k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 7 ? write cycle 1 (we# controlled) (1,2,3,5,6) dout din data valid t dw t dh (4) high-z t whz we# t wp t cw t wr t as (4) t ow ce# t aw address t wc ce2 write cycle 2 (ce# and ce2 controlled) (1,2,5,6) dout din data valid t dw t dh (4) high-z t whz we# t wp t cw ce# t wr t as t aw address t wc ce2 notes : 1.we#, ce# must be high or ce2 must be low during all address transitions. 2.a write occurs during the overlap of a low ce#, high ce2, low we#. 3.during a we#controlled write cycle with oe# low, t wp must be greater than t whz + t dw to allow the drivers to turn off and data to be placed on the bus. 4.during this period, i/o pins are in the out put state, and input signals must not be applied. 5.if the ce#low transition and ce2 high transit ion occurs simultaneously with or after we# low transition, the outputs remain i n a high impedance state. 6.t ow and t whz are specified with c l = 5pf. transition is measured 500mv from steady state.
LY6220488 rev. 0.3 2048k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 8 ? data retention characteristics parameter symbol test condition min. typ. max. unit v cc for data retention v dr ce# v R cc - 0.2v or ce2 Q 0.2v 1.5 - 5.5 v -ll - 8 50 a -lle - 8 60 a data retention current i dr v cc = 1.5v ce# v R cc - 0.2v or ce2 Q 0.2v other pins at 0.2v or v cc - 0.2v -lli - 8 80 a chip disable to data retention time t cdr see data retention waveforms (below) 0 - - ns recovery time t r t rc * - - ns t rc * = read cycle time data retention waveform low vcc data retention waveform (1) ( ce# controlled) vcc ce# v dr R 1.5v ce# v R cc-0.2v vcc(min.) v ih t r t cdr v ih vcc(min.) low vcc data retention waveform (2) (ce2 controlled) vcc ce2 v dr R 1.5v ce2 Q 0.2v vcc(min.) v il t r t cdr v il vcc(min.)
LY6220488 rev. 0.3 2048k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 9 ? package outline dimension 44-pin 400mil tsop-ii package outline dimension dimensions in millmeters dimensions in mils symbols min. nom. max. min. nom. max. a - - 1.20 - - 47.2 a1 0.05 0.10 0. 15 2.0 3.9 5.9 a2 0.95 1.00 1. 05 37.4 39.4 41.3 b 0.30 - 0.45 11.8 - 17.7 c 0.12 - 0.21 4.7 - 8.3 d 18.212 18.415 18.618 717 725 733 e 11.506 11.760 12.014 453 463 473 e1 9.957 10.160 10.363 392 400 408 e - 0.800 - - 31.5 - l 0.40 0.50 0.60 15.7 19.7 23.6 zd - 0.805 - - 31.7 - y - - 0.076 - - 3 0 o 3 o 6 o 0 o 3 o 6 o
LY6220488 rev. 0.3 2048k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 10 ? ordering information LY6220488 u v - ww xx y z z : packing type blank : tube or tray t : tape reel y : temperature range blank : (commercial) 0c ~ 70c e : (extended) -20c ~ +80c i : (industrial) -40c ~ +85c u : package type m : 44-pin 400 mil tsop-ii ww : access time(speed) xx : power type ll : ultra low power v : lead information l : green package
LY6220488 rev. 0.3 2048k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 11 ? this page is left blank intentionally.

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